Main: 34 × 17 Christie MicroTiles 0.75 S60
- Size
- 8.16 × 4.59 m
- Diagonal
- 369 in
- Area
- 37.5 m²
- Resolution
- 10,880 × 6,120 px
- Pixels
- 66.59 M px
- Panels
- 578 + 29 spares
- Weight
- 1,272 kg panels only
- Power
- 18.5 kW max, 9.2 kW typical, 7 circuits
- Data
- 170 runs on 34 processors at 60 Hz 8-bit
This is a live example. Change the panel and the size in the steps and every figure recomputes.
| Main | Christie MicroTiles 0.75 S60 | 34 × 17 | 8.16 × 4.59 m · 369 in | 10,880 × 6,120 px | wall-mounted |
- Panels
- 578 + 29 spares
- Weight
- 1,272 kg panels only
- Power
- 18.5 kW max, 9.2 kW typical, 7 circuits
- Data
- 170 runs on 34 processors at 60 Hz 8-bit
The install list, the data wiring and power run plans, the cable tags and the system sheet print with a Solo account: rigplan.app/pricing
Data wiring 170 runs · up to 4 panels per run at 80% · worst 71% · 34× NovaStar VX1000 · fed from the top
Display connection file 🔒 The file NovaLCT loads under Screen Connection, Load from File; the receiving card file still comes from the maker.
| Run 1 | Column 1, rows 1 to 4 | 4 panels · 71% of port |
| Run 2 | Column 1, rows 5 to 8 | 4 panels · 71% of port |
| Run 3 | Column 1, rows 9 to 11 | 3 panels · 53% of port |
| Run 4 | Column 1, rows 12 to 14 | 3 panels · 53% of port |
| Run 5 | Column 1, rows 15 to 17 | 3 panels · 53% of port |
| Run 6 | Column 2, rows 1 to 4 | 4 panels · 71% of port |
| Run 7 | Column 2, rows 5 to 8 | 4 panels · 71% of port |
| Run 8 | Column 2, rows 9 to 11 | 3 panels · 53% of port |
| Run 9 | Column 2, rows 12 to 14 | 3 panels · 53% of port |
| Run 10 | Column 2, rows 15 to 17 | 3 panels · 53% of port |
| Run 11 | Column 3, rows 1 to 4 | 4 panels · 71% of port |
| Run 12 | Column 3, rows 5 to 8 | 4 panels · 71% of port |
| Run 13 | Column 3, rows 9 to 11 | 3 panels · 53% of port |
| Run 14 | Column 3, rows 12 to 14 | 3 panels · 53% of port |
| Run 15 | Column 3, rows 15 to 17 | 3 panels · 53% of port |
| Run 16 | Column 4, rows 1 to 4 | 4 panels · 71% of port |
| Run 17 | Column 4, rows 5 to 8 | 4 panels · 71% of port |
| Run 18 | Column 4, rows 9 to 11 | 3 panels · 53% of port |
| Run 19 | Column 4, rows 12 to 14 | 3 panels · 53% of port |
| Run 20 | Column 4, rows 15 to 17 | 3 panels · 53% of port |
| Run 21 | Column 5, rows 1 to 4 | 4 panels · 71% of port |
| Run 22 | Column 5, rows 5 to 8 | 4 panels · 71% of port |
| Run 23 | Column 5, rows 9 to 11 | 3 panels · 53% of port |
| Run 24 | Column 5, rows 12 to 14 | 3 panels · 53% of port |
| Run 25 | Column 5, rows 15 to 17 | 3 panels · 53% of port |
| Run 26 | Column 6, rows 1 to 4 | 4 panels · 71% of port |
| Run 27 | Column 6, rows 5 to 8 | 4 panels · 71% of port |
| Run 28 | Column 6, rows 9 to 11 | 3 panels · 53% of port |
| Run 29 | Column 6, rows 12 to 14 | 3 panels · 53% of port |
| Run 30 | Column 6, rows 15 to 17 | 3 panels · 53% of port |
| Run 31 | Column 7, rows 1 to 4 | 4 panels · 71% of port |
| Run 32 | Column 7, rows 5 to 8 | 4 panels · 71% of port |
| Run 33 | Column 7, rows 9 to 11 | 3 panels · 53% of port |
| Run 34 | Column 7, rows 12 to 14 | 3 panels · 53% of port |
| Run 35 | Column 7, rows 15 to 17 | 3 panels · 53% of port |
| Run 36 | Column 8, rows 1 to 4 | 4 panels · 71% of port |
| Run 37 | Column 8, rows 5 to 8 | 4 panels · 71% of port |
| Run 38 | Column 8, rows 9 to 11 | 3 panels · 53% of port |
| Run 39 | Column 8, rows 12 to 14 | 3 panels · 53% of port |
| Run 40 | Column 8, rows 15 to 17 | 3 panels · 53% of port |
| Run 41 | Column 9, rows 1 to 4 | 4 panels · 71% of port |
| Run 42 | Column 9, rows 5 to 8 | 4 panels · 71% of port |
| Run 43 | Column 9, rows 9 to 11 | 3 panels · 53% of port |
| Run 44 | Column 9, rows 12 to 14 | 3 panels · 53% of port |
| Run 45 | Column 9, rows 15 to 17 | 3 panels · 53% of port |
| Run 46 | Column 10, rows 1 to 4 | 4 panels · 71% of port |
| Run 47 | Column 10, rows 5 to 8 | 4 panels · 71% of port |
| Run 48 | Column 10, rows 9 to 11 | 3 panels · 53% of port |
| Run 49 | Column 10, rows 12 to 14 | 3 panels · 53% of port |
| Run 50 | Column 10, rows 15 to 17 | 3 panels · 53% of port |
| Run 51 | Column 11, rows 1 to 4 | 4 panels · 71% of port |
| Run 52 | Column 11, rows 5 to 8 | 4 panels · 71% of port |
| Run 53 | Column 11, rows 9 to 11 | 3 panels · 53% of port |
| Run 54 | Column 11, rows 12 to 14 | 3 panels · 53% of port |
| Run 55 | Column 11, rows 15 to 17 | 3 panels · 53% of port |
| Run 56 | Column 12, rows 1 to 4 | 4 panels · 71% of port |
| Run 57 | Column 12, rows 5 to 8 | 4 panels · 71% of port |
| Run 58 | Column 12, rows 9 to 11 | 3 panels · 53% of port |
| Run 59 | Column 12, rows 12 to 14 | 3 panels · 53% of port |
| Run 60 | Column 12, rows 15 to 17 | 3 panels · 53% of port |
| Run 61 | Column 13, rows 1 to 4 | 4 panels · 71% of port |
| Run 62 | Column 13, rows 5 to 8 | 4 panels · 71% of port |
| Run 63 | Column 13, rows 9 to 11 | 3 panels · 53% of port |
| Run 64 | Column 13, rows 12 to 14 | 3 panels · 53% of port |
| Run 65 | Column 13, rows 15 to 17 | 3 panels · 53% of port |
| Run 66 | Column 14, rows 1 to 4 | 4 panels · 71% of port |
| Run 67 | Column 14, rows 5 to 8 | 4 panels · 71% of port |
| Run 68 | Column 14, rows 9 to 11 | 3 panels · 53% of port |
| Run 69 | Column 14, rows 12 to 14 | 3 panels · 53% of port |
| Run 70 | Column 14, rows 15 to 17 | 3 panels · 53% of port |
| Run 71 | Column 15, rows 1 to 4 | 4 panels · 71% of port |
| Run 72 | Column 15, rows 5 to 8 | 4 panels · 71% of port |
| Run 73 | Column 15, rows 9 to 11 | 3 panels · 53% of port |
| Run 74 | Column 15, rows 12 to 14 | 3 panels · 53% of port |
| Run 75 | Column 15, rows 15 to 17 | 3 panels · 53% of port |
| Run 76 | Column 16, rows 1 to 4 | 4 panels · 71% of port |
| Run 77 | Column 16, rows 5 to 8 | 4 panels · 71% of port |
| Run 78 | Column 16, rows 9 to 11 | 3 panels · 53% of port |
| Run 79 | Column 16, rows 12 to 14 | 3 panels · 53% of port |
| Run 80 | Column 16, rows 15 to 17 | 3 panels · 53% of port |
| Run 81 | Column 17, rows 1 to 4 | 4 panels · 71% of port |
| Run 82 | Column 17, rows 5 to 8 | 4 panels · 71% of port |
| Run 83 | Column 17, rows 9 to 11 | 3 panels · 53% of port |
| Run 84 | Column 17, rows 12 to 14 | 3 panels · 53% of port |
| Run 85 | Column 17, rows 15 to 17 | 3 panels · 53% of port |
| Run 86 | Column 18, rows 1 to 4 | 4 panels · 71% of port |
| Run 87 | Column 18, rows 5 to 8 | 4 panels · 71% of port |
| Run 88 | Column 18, rows 9 to 11 | 3 panels · 53% of port |
| Run 89 | Column 18, rows 12 to 14 | 3 panels · 53% of port |
| Run 90 | Column 18, rows 15 to 17 | 3 panels · 53% of port |
| Run 91 | Column 19, rows 1 to 4 | 4 panels · 71% of port |
| Run 92 | Column 19, rows 5 to 8 | 4 panels · 71% of port |
| Run 93 | Column 19, rows 9 to 11 | 3 panels · 53% of port |
| Run 94 | Column 19, rows 12 to 14 | 3 panels · 53% of port |
| Run 95 | Column 19, rows 15 to 17 | 3 panels · 53% of port |
| Run 96 | Column 20, rows 1 to 4 | 4 panels · 71% of port |
| Run 97 | Column 20, rows 5 to 8 | 4 panels · 71% of port |
| Run 98 | Column 20, rows 9 to 11 | 3 panels · 53% of port |
| Run 99 | Column 20, rows 12 to 14 | 3 panels · 53% of port |
| Run 100 | Column 20, rows 15 to 17 | 3 panels · 53% of port |
| Run 101 | Column 21, rows 1 to 4 | 4 panels · 71% of port |
| Run 102 | Column 21, rows 5 to 8 | 4 panels · 71% of port |
| Run 103 | Column 21, rows 9 to 11 | 3 panels · 53% of port |
| Run 104 | Column 21, rows 12 to 14 | 3 panels · 53% of port |
| Run 105 | Column 21, rows 15 to 17 | 3 panels · 53% of port |
| Run 106 | Column 22, rows 1 to 4 | 4 panels · 71% of port |
| Run 107 | Column 22, rows 5 to 8 | 4 panels · 71% of port |
| Run 108 | Column 22, rows 9 to 11 | 3 panels · 53% of port |
| Run 109 | Column 22, rows 12 to 14 | 3 panels · 53% of port |
| Run 110 | Column 22, rows 15 to 17 | 3 panels · 53% of port |
| Run 111 | Column 23, rows 1 to 4 | 4 panels · 71% of port |
| Run 112 | Column 23, rows 5 to 8 | 4 panels · 71% of port |
| Run 113 | Column 23, rows 9 to 11 | 3 panels · 53% of port |
| Run 114 | Column 23, rows 12 to 14 | 3 panels · 53% of port |
| Run 115 | Column 23, rows 15 to 17 | 3 panels · 53% of port |
| Run 116 | Column 24, rows 1 to 4 | 4 panels · 71% of port |
| Run 117 | Column 24, rows 5 to 8 | 4 panels · 71% of port |
| Run 118 | Column 24, rows 9 to 11 | 3 panels · 53% of port |
| Run 119 | Column 24, rows 12 to 14 | 3 panels · 53% of port |
| Run 120 | Column 24, rows 15 to 17 | 3 panels · 53% of port |
| Run 121 | Column 25, rows 1 to 4 | 4 panels · 71% of port |
| Run 122 | Column 25, rows 5 to 8 | 4 panels · 71% of port |
| Run 123 | Column 25, rows 9 to 11 | 3 panels · 53% of port |
| Run 124 | Column 25, rows 12 to 14 | 3 panels · 53% of port |
| Run 125 | Column 25, rows 15 to 17 | 3 panels · 53% of port |
| Run 126 | Column 26, rows 1 to 4 | 4 panels · 71% of port |
| Run 127 | Column 26, rows 5 to 8 | 4 panels · 71% of port |
| Run 128 | Column 26, rows 9 to 11 | 3 panels · 53% of port |
| Run 129 | Column 26, rows 12 to 14 | 3 panels · 53% of port |
| Run 130 | Column 26, rows 15 to 17 | 3 panels · 53% of port |
| Run 131 | Column 27, rows 1 to 4 | 4 panels · 71% of port |
| Run 132 | Column 27, rows 5 to 8 | 4 panels · 71% of port |
| Run 133 | Column 27, rows 9 to 11 | 3 panels · 53% of port |
| Run 134 | Column 27, rows 12 to 14 | 3 panels · 53% of port |
| Run 135 | Column 27, rows 15 to 17 | 3 panels · 53% of port |
| Run 136 | Column 28, rows 1 to 4 | 4 panels · 71% of port |
| Run 137 | Column 28, rows 5 to 8 | 4 panels · 71% of port |
| Run 138 | Column 28, rows 9 to 11 | 3 panels · 53% of port |
| Run 139 | Column 28, rows 12 to 14 | 3 panels · 53% of port |
| Run 140 | Column 28, rows 15 to 17 | 3 panels · 53% of port |
| Run 141 | Column 29, rows 1 to 4 | 4 panels · 71% of port |
| Run 142 | Column 29, rows 5 to 8 | 4 panels · 71% of port |
| Run 143 | Column 29, rows 9 to 11 | 3 panels · 53% of port |
| Run 144 | Column 29, rows 12 to 14 | 3 panels · 53% of port |
| Run 145 | Column 29, rows 15 to 17 | 3 panels · 53% of port |
| Run 146 | Column 30, rows 1 to 4 | 4 panels · 71% of port |
| Run 147 | Column 30, rows 5 to 8 | 4 panels · 71% of port |
| Run 148 | Column 30, rows 9 to 11 | 3 panels · 53% of port |
| Run 149 | Column 30, rows 12 to 14 | 3 panels · 53% of port |
| Run 150 | Column 30, rows 15 to 17 | 3 panels · 53% of port |
| Run 151 | Column 31, rows 1 to 4 | 4 panels · 71% of port |
| Run 152 | Column 31, rows 5 to 8 | 4 panels · 71% of port |
| Run 153 | Column 31, rows 9 to 11 | 3 panels · 53% of port |
| Run 154 | Column 31, rows 12 to 14 | 3 panels · 53% of port |
| Run 155 | Column 31, rows 15 to 17 | 3 panels · 53% of port |
| Run 156 | Column 32, rows 1 to 4 | 4 panels · 71% of port |
| Run 157 | Column 32, rows 5 to 8 | 4 panels · 71% of port |
| Run 158 | Column 32, rows 9 to 11 | 3 panels · 53% of port |
| Run 159 | Column 32, rows 12 to 14 | 3 panels · 53% of port |
| Run 160 | Column 32, rows 15 to 17 | 3 panels · 53% of port |
| Run 161 | Column 33, rows 1 to 4 | 4 panels · 71% of port |
| Run 162 | Column 33, rows 5 to 8 | 4 panels · 71% of port |
| Run 163 | Column 33, rows 9 to 11 | 3 panels · 53% of port |
| Run 164 | Column 33, rows 12 to 14 | 3 panels · 53% of port |
| Run 165 | Column 33, rows 15 to 17 | 3 panels · 53% of port |
| Run 166 | Column 34, rows 1 to 4 | 4 panels · 71% of port |
| Run 167 | Column 34, rows 5 to 8 | 4 panels · 71% of port |
| Run 168 | Column 34, rows 9 to 11 | 3 panels · 53% of port |
| Run 169 | Column 34, rows 12 to 14 | 3 panels · 53% of port |
| Run 170 | Column 34, rows 15 to 17 | 3 panels · 53% of port |
Power runs 7 circuits · up to 85 panels/circuit · 18.5 kW max · 1× distro
| Circuit 1 | Columns 1 to 5, snake up and down, hops right | 85 panels · 2,720 W · 92% · Distro 1 · L1 |
| Circuit 2 | Columns 6 to 10, snake up and down, hops right | 85 panels · 2,720 W · 92% · Distro 1 · L2 |
| Circuit 3 | Columns 11 to 15, snake up and down, hops right | 85 panels · 2,720 W · 92% · Distro 1 · L3 |
| Circuit 4 | Columns 16 to 20, snake up and down, hops right | 85 panels · 2,720 W · 92% · Distro 1 · L1 |
| Circuit 5 | Columns 21 to 25, snake up and down, hops right | 85 panels · 2,720 W · 92% · Distro 1 · L2 |
| Circuit 6 | Columns 26 to 30, snake up and down, hops right | 85 panels · 2,720 W · 92% · Distro 1 · L3 |
| Circuit 7 | Columns 31 to 34, snake up and down, hops right | 68 panels · 2,176 W · 74% · Distro 1 · L1 |
| Patch | Distro 1: circuits 1 to 7 (L1×3 L2×2 L3×2) | |
The rules behind every number
Every quantity above is derived from the rules below, written with working AV techs and corrected as they red-pen them.
- openSpare panels: 5% of wall count, minimum 2 (wall-mounted, spares kept on site at the one-off rate).
- ✓ confirmedWall-mounted: the wall or structure carries the panels, 1,272 kg over 8.16 × 4.59 m, about 34 kg/m² plus your fixing hardware. Nothing hangs from the panels, so the hang limit does not apply. The structure is designed for the site and is not derived here; no bumpers, points, ground support, distros, cases or truck are listed.
- ✓ confirmedCircuits sized on max load (full white) at 80% derate: 92 panels per 16 A / 230 V circuit (32 W/panel). Typical draw shown separately for the venue/generator ask.
- ✓ confirmedPower runs follow the connectors: in one side, out the other, gendered plugs, jumpers as short as the maker can get away with. Vertical works both ways, sideways only one hop to the right (rear view), so a run may snake up and down across adjacent columns, but never left and right. Vertical snakes over 5 columns need 7 circuits (single columns would need 34, full rows 17).
- openPower for a permanent install comes as 7 house circuits from the building's distribution board; no distro or feeders are listed. TRUE1 jumpers = panels − runs, +10% spare.
- ✓ confirmedRuns are load-balanced: panels split evenly across the circuits a shape needs (12+12, never 18+6) so every main-in pulls about the same. Phases are a suggested round-robin L1 to L3 within each distro.
- ✓ confirmedExact-pixel mapping (NovaStar VX1000): a port carries only the panels wired to it, and data snakes in any direction (unlike power). Wiring follows whole columns as vertical serpentines, numbered from the left seen from the rear, the natural reading order when patching, with every run capped at 80% of 650 k px per 1G port at 60 Hz 8-bit (threshold, refresh and depth adjustable): at most 4 panels per run, giving 170 runs, each looped back to a B port on a second unit, worst run 71%. Loads balance evenly across runs. Capacity is the sheet figure at 8-bit; refresh scales as 60/Hz. No sheet publishes a per-port width cap; the MX40 Pro’s minimum load width is applied where it bites. Correct me with measured figures.
- ✓ confirmedRedundancy defaults off. Rental shows rarely run looped data; it is primarily a critical-installation feature. Turning it on gives every run a B loop from a second unit, so the processor count doubles.
- openData enters each run at the top of its first column and snakes on from there, so the drawing, the cable tags and the connection file all start at that end. The entry end is a choice per wall; the runs, ports and processors stay the same either way.
- openHome runs cut at run distance + wall height + 5 m service loop.
- openProcessors are checked on two limits: port count and total pixel capacity (capacities placeholder).
- ✓ confirmedProcessor list defaults to NovaStar (VX1000 first, UHD Jr / MCTRL / MX / VX family). Rental houses rarely run Brompton; it stays available for the shops that do. All figures verified against manufacturer spec sheets.
- openElectronics spares: 1 receiving card per 25 panels, 1 PSU per 25, minimum 1 each.
Cable tags 1326 tags · 170 data runs · 7 circuits
One label per cable, both ends named, in the order the runs are wired: cabinets as column and row seen from the rear, c1r1 top left. Print them, or copy the list as CSV for a label printer.
Copy tags as CSV 🔒The tag list, your own label format, and the CSV for a label printer are a Solo feature.
Panels 0/4 done
| 578 pcs | Christie MicroTiles 0.75 S60 tiles | 34×17 wall, 8.2×4.6 m | ||
| 29 pcs | Spare tiles | one-off rate 5% | ||
| 24 pcs | Spare receiving cards | |||
| 24 pcs | Spare PSUs |
Rigging 0/1 done
| 1 set | Mounting structure | site-specific, not derived; carries 1,272 kg, about 34 kg/m² |
Power 0/2 done
| 7 pcs | House circuits (16 A / 230 V) | 18.5 kW max · ~9.2 kW typical content · from the building's board | ||
| 629 pcs | TRUE1 jumpers | panel-to-panel, incl. 10% spare |
Data & control 0/3 done
| 34 pcs | NovaStar VX1000 | 340/340 ports used (A and B, 17 + 17 units) | ||
| 340 pcs | Cat6A home runs, ~40 m | run + height + 5 m loop, A and B | ||
| 636 pcs | Cat6 panel jumpers | incl. 10% spare |